network_stuff:arista:arista
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| network_stuff:arista:arista [2025/08/03 11:54] – jotasandoku | network_stuff:arista:arista [2025/10/04 20:42] (current) – [decoding the model code] jotasandoku | ||
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| * **7050X3** - 48 x 25 G SFP28 + 8 x 100 G QSFP | * **7050X3** - 48 x 25 G SFP28 + 8 x 100 G QSFP | ||
| * role: leaf / top-of-rack for dense 25 G servers and 100 G uplinks | * role: leaf / top-of-rack for dense 25 G servers and 100 G uplinks | ||
| - | * asic: Broadcom Trident3 | + | * asic: Broadcom Trident3 |
| * **7060X5** - 32 x 400 G QSFP-DD (break-outs up to 2 x 800 G) | * **7060X5** - 32 x 400 G QSFP-DD (break-outs up to 2 x 800 G) | ||
| * role: 400 / 800 G spine for AI-ML clusters and hyperscale clouds | * role: 400 / 800 G spine for AI-ML clusters and hyperscale clouds | ||
| - | * asic: Broadcom Tomahawk5 | + | * asic: Broadcom Tomahawk5 |
| * **7060X4** - 32 x 400 G QSFP-DD | * **7060X4** - 32 x 400 G QSFP-DD | ||
| Line 15: | Line 15: | ||
| * **7130** - layer-1 matrix, 4 ns port-to-port, | * **7130** - layer-1 matrix, 4 ns port-to-port, | ||
| * role: ultra-low-latency taps, matrix switches, time stamping | * role: ultra-low-latency taps, matrix switches, time stamping | ||
| - | * asic: Xilinx UltraScale+ FPGA cross-point | + | * asic: Xilinx UltraScale+ FPGA cross-point |
| * **7150** - ~350 ns L2/L3 forwarding | * **7150** - ~350 ns L2/L3 forwarding | ||
| * role: high-frequency trading leaf or edge | * role: high-frequency trading leaf or edge | ||
| - | * asic: Intel (Fulcrum) Alta FM6000 | + | * asic: Intel (Fulcrum) Alta FM6000 |
| * **7160-48TC6** - 48 x 10GBASE-T + 6 x 100 G QSFP | * **7160-48TC6** - 48 x 10GBASE-T + 6 x 100 G QSFP | ||
| * role: high-density 10 G leaf or campus aggregation | * role: high-density 10 G leaf or campus aggregation | ||
| - | * asic: Broadcom Trident3 with AlgoMatch | + | * asic: Broadcom Trident3 with AlgoMatch |
| * **7170** - 32 / 64 x 100 G QSFP with P4-programmable pipeline | * **7170** - 32 / 64 x 100 G QSFP with P4-programmable pipeline | ||
| * role: telemetry, service chaining, packet engineering | * role: telemetry, service chaining, packet engineering | ||
| - | * asic: Intel Barefoot Tofino | + | * asic: Intel Barefoot Tofino |
| * **7280R3** - 32 x 100 G QSFP (deep buffer) | * **7280R3** - 32 x 100 G QSFP (deep buffer) | ||
| * role: universal leaf / edge router with internet-scale tables | * role: universal leaf / edge router with internet-scale tables | ||
| - | * asic: Broadcom Jericho2 | + | * asic: Broadcom Jericho2 |
| * **7508R3** - modular, up to 288 x 400 G OSFP or QSFP-DD | * **7508R3** - modular, up to 288 x 400 G OSFP or QSFP-DD | ||
| * role: universal spine or data-centre core up to 230 Tbps | * role: universal spine or data-centre core up to 230 Tbps | ||
| - | * asic: Broadcom Jericho2C+ | + | * asic: Broadcom Jericho2C+ |
| ===== decoding the model code ===== | ===== decoding the model code ===== | ||
| Line 63: | Line 63: | ||
| * R3 - third hardware generation | * R3 - third hardware generation | ||
| - | * **RCM** in the docs is not a port at all. It’s the *Regulatory Compliance Mark* used in Australia and New Zealand to show the kit meets local safety and EMC rules. | ||
| - | + | ---- | |
| - | --- | + | |
| Line 280: | Line 278: | ||
| === LAYER 1 SWITCHING === | === LAYER 1 SWITCHING === | ||
| [[https:// | [[https:// | ||
| + | |||
| + | |||
| + | ---- | ||
| + | |||
| + | === configuration replace === | ||
| + | |||
| + | |||
| + | scp new.cfg admin@SW1:/ | ||
| + | ! ssh to the switch | ||
| + | dir flash: | ||
| + | copy running-config flash: | ||
| + | wr | ||
| + | reload in 10 ! failsafe | ||
| + | configure replace flash: | ||
| + | ! | ||
| + | ! wait until 9 mins to be sure not locked out due to routing reconverging down thee line! | ||
| + | reload cancel | ||
| + | ! configure replace flash: | ||
network_stuff/arista/arista.1754222091.txt.gz · Last modified: by jotasandoku
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