fintech:low_latency
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| fintech:low_latency [2023/05/18 13:44] – jotasandoku | fintech:low_latency [2023/11/02 14:38] (current) – external edit 127.0.0.1 | ||
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| LAYER 1 SWITCHES AND FPGA: | LAYER 1 SWITCHES AND FPGA: | ||
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| - | * They are the good old crosspoint bars. Application: | + | * L1 sw are the good old crosspoint bars. Application: |
| + | * with FPGA some additional logic can be introduced directly on L1 (like trading algorithms) | ||
| + | * Latency can be as low as 4ns (much lower is not possible as 4ns is 120cm at the speed of light) | ||
| + | * Arista 7130 | ||
| * [[https:// | * [[https:// | ||
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